A small number of D1c products will be launched on the market for the first time, first by SK Hynix.
A small number of D1c products will be launched on the market for the first time in the first quarter of 2025, first by SK Hynix. The D1c generation will dominate in 2026 and 2027, including HBM4 DRAM applications. From a market perspective, HBM products, especially HBM3 and HBM3E, have excellent performance but are currently expensive, while traditional products such as LPDDR5 and DDR5 devices are lower priced and have relatively weaker performance.
In the future, AI and data centers will require higher memory capacity per die, such as 32 Gb, 48 Gb, or 64 Gb chips, but the mainstream in the market is still 16 Gb die. In higher density DRAM chips, 3D DRAM architectures such as 4F2 vertical channel transistor (VCT) cells, IGZO DRAM cells, or 3D stacked DRAM cells should be developed and productized at sub-10nm nodes (single-digit nodes), especially major manufacturers such as Samsung, SK Hynix, and Micron, as candidates for next-generation DRAM scaling.
D1a and D1b are mainstream products in the market. By the end of 2027, we expect DRAM to enter single-digit nanometer technology nodes such as D0a, followed by 0b and 0c generations.